Power has been the stumbling block in the path to achieve continued performance growth for modern processor architectures. The fundamental challenge of the power issue is two-fold. First, for any computing system, a rapid increase in power dissipation results in thermal runaway—a vicious cycle where high power dissipation creates thermal hot spots; higher temperature leads to higher leakage power, which heightens power consumption, creating more thermal hot spots. Frequent thermal hot spots and high power dissipation not only degrade overall system energy efficiency but can also affect functional correctness of the hardware.
The second challenge is in the usage of energy itself, i.e., energy utilization efficiency. As we increase the power consumption, a large fraction of the actual energy is wasted in the form of heat. Removing wasted heat from the system requires more power for cooling, which further lowers overall energy efficiency, exacerbating the vicious cycle.
In order to address these challenges and ensure that all transistors can perform correct computations, it is important to implement proper temperature control and energy management techniques that reduce the risk of failure due to thermal hot spots. Prior approaches have proposed to aggressively remove the heat generated from computations by incorporating (1) active cooling mechanisms and/or, (2) applying effective dynamic thermal management techniques.
Active cooling mechanisms are commonly applied to quickly dissipate the heat generated on computing devices. Although common cooling techniques such as mechanical fans, heat spreaders, or liquid-based or oil-based cooling techniques, can effectively reduce the device temperature, they require extra energy to just remove the wasted heat energy. For example, using mechanical fans to cool down the temperature of the CPU requires significant space for the heat sink and fan installation, and it draws additional power to propel the fan.
In addition to devising effective cooling mechanisms to remove heat externally, modern processors are governed by a collection of dynamic thermal management (DTM) techniques to reduce thermal emergencies. In contrast to removing heat, DTM techniques avoid processor core overheating by slowing down heat generation. When processor cores are operating at a temperature higher than a pre-determined temperature that may cause a potential thermal hazard, the DTM governor throttles the core frequency. Since DTM techniques address the problem by avoiding it, the computation power of the processor is not maximally utilized. In other words, DTM-based solutions often work at the expense of performance.
In summary, both heat removal using conventional active cooling mechanisms and heat avoidance using DTM techniques are suboptimal solutions. This is because the chip temperature is often governed by a few hot spots on the chip. In order to ensure that the CPU operates under a certain temperature threshold, cooling mechanisms and/or DTM solutions have to be activated when any of the chip location reaches this threshold. This results in an overkill for the rest of the chip that is often much cooler than the hot spots. Alternatively, localized hot-spot cooling using miniature thermoelectric coolers has been investigated for processors; however, it requires additional electric power input.
The heat distribution of computing platforms offers an interesting opportunity for heat and energy optimization, both in the horizontal and vertical dimensions. Within a processor chip, the temperature difference between the hottest components, e.g., load-store queues (LSQ), arithmetic logic units, or power supply rails, and the coldest components, e.g., the I/O panel or the large last-level cache, can easily be more than 30° C. with the CPU's cooling fan turned on. FIG. 1 illustrates a heat map of an INTEL Core i5 3470 Processor captured on an infrared camera. The temperature of the hottest spot is at 85° C. whereas the cooler area of the processor is at 56° C. for this particular application example. Regardless of the processor architecture, the CPU hot spot characteristics, i.e., small concentrated hot spots versus large, sparse cooler areas remain similar. To exploit the thermal characteristics of a processor, the proposed framework leverages the thermoelectric effect by employing thermoelectric generators (TEGs) to generate electricity from a temperature difference and use the harvested energy to power thermoelectric coolers (TECs) to lower the temperature of hot spots. The thermoelectric effect is the phenomenon where a difference in temperature creates an electric voltage difference, and vice versa. When a voltage is applied to a thermoelectric material, the splitting and combination of electron hole pairs result in a temperature difference on the material, called the Peltier effect. Therefore, the thermoelectric material can be used as a cooler. Conversely, if the material is subjected to a difference in temperature, a voltage difference is created, called the Seebeck effect. We leverage the Seebeck effect to recover the otherwise wasted heat energy on a computing platform and transform it into electricity, and exploit the Peltier effect to lower the temperature of hot spots. FIG. 2 shows the basic element of generating electricity from a heat source using the Seebeck thermoelectric effect. A thermoelectric semiconductor material is mounted between two electrodes and generates a flow of electron (hole) current when the two ends of the device are subjected to a difference in temperature. In the case for FIG. 2, one p-type and one n-type semiconductor materials are connected in series to generate a larger thermoelectric current. Such a Seebeck thermoelectric device is called a TEG, with a typical construction shown in FIG. 3. A typical construction of the TEG contains many basic thermoelectric semiconductor elements connected in series to generate a larger voltage and current. As discussed earlier, when the module is supplied with a voltage difference, it creates a temperature difference and acts as a TEC.
The ability to generate electricity from a temperature differential was shown to be possible at a practical usage level in recent material science breakthroughs, such as the use of thermoelectric devices to power a wireless transmitter. Other developments have shown the use of thermoelectric materials to supply power to body-worn electronics and environmental sensors. The challenges faced in such application domains are (1) the fast-changing ambient conditions that directly introduce variations in the harvested energy, and (2) the small amount of voltage generated (around 50 uW at a voltage in the order of mV) because the temperature difference between the body and ambient for body-wearable applications is only 3 to 5° C. In addition, energy conversation efficiency of thermoelectric materials is still relatively low at about 30%. As such, further improvements in providing a sustainable self-cooling of CPU thermal hot spots using thermoelectric materials is desired.
Corresponding reference characters indicate corresponding elements among the view of the drawings. The headings used in the figures do not limit the scope of the claims.